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The UltraSPARC II, code-named "Blackbird", is a microprocessor implementation of the SPARC V9 instruction set architecture (ISA) developed by Sun Microsystems. Marc Tremblay was the chief architect. Introduced in 1997, it was further development of the UltraSPARC operating at higher clock frequencies of 250 MHz, eventually reaching 650 MHz. The die contained 5.4 million transistors and had an area of 149 mm². It was fabricated by Texas Instruments in their 0.35 μm process, dissipated 25 W at 205 MHz, and used a 2.5 V power supply. L2 cache capacity was 1 to 4 MB.

Attributes	Values
rdf:type	Thing software
rdfs:label	UltraSPARC II (en)
rdfs:comment	The UltraSPARC II, code-named "Blackbird", is a microprocessor implementation of the SPARC V9 instruction set architecture (ISA) developed by Sun Microsystems. Marc Tremblay was the chief architect. Introduced in 1997, it was further development of the UltraSPARC operating at higher clock frequencies of 250 MHz, eventually reaching 650 MHz. The die contained 5.4 million transistors and had an area of 149 mm². It was fabricated by Texas Instruments in their 0.35 μm process, dissipated 25 W at 205 MHz, and used a 2.5 V power supply. L2 cache capacity was 1 to 4 MB. (en)
differentFrom	UltraSPARC III
sameAs	UltraSPARC II UltraSPARC II
dbp:wikiPageUsesTemplate	dbt:Cite_journal dbt:Clear dbt:Redirect-distinguish dbt:Reflist dbt:Infobox_CPU dbt:Sun_hardware
Subject	SPARC microprocessors Sun microprocessors Superscalar microprocessors 64-bit microprocessors
gold:hypernym	Implementability
prov:wasDerivedFrom	http://en.wikipedia.org/wiki/UltraSPARC_II?oldid=1061338060&ns=0
Wikipage page ID	22522670 (xsd:integer)
page length (characters) of wiki page	5258 (xsd:nonNegativeInteger)
Wikipage revision ID	1061338060 (xsd:integer)
has abstract	The UltraSPARC II, code-named "Blackbird", is a microprocessor implementation of the SPARC V9 instruction set architecture (ISA) developed by Sun Microsystems. Marc Tremblay was the chief architect. Introduced in 1997, it was further development of the UltraSPARC operating at higher clock frequencies of 250 MHz, eventually reaching 650 MHz. The die contained 5.4 million transistors and had an area of 149 mm². It was fabricated by Texas Instruments in their 0.35 μm process, dissipated 25 W at 205 MHz, and used a 2.5 V power supply. L2 cache capacity was 1 to 4 MB. In 1999, the UltraSPARC II was ported to a 0.25 μm process. This version was code-named "Sapphire-Black". It operated at 360 to 480 MHz, possessed a die area of 126 mm², dissipated 21 W at 400 MHz and the power supply voltage was reduced to 1.9 V. Supported L2 cache capacity was increased to 1 to 8 MB. (en)
foaf:isPrimaryTopicOf	http://en.wikipedia.org/wiki/UltraSPARC_II
is differentFrom of	UltraSPARC III
is Wikipage redirect of	UltraSPARC IIe UltraSPARC IIe+ UltraSPARC IIi
is Link from a Wikipage to another Wikipage of	History of computing hardware List of computer technology code names Microprocessor chronology HAL SPARC64 Land grid array Marc Tremblay
is CPU of	Ultra 60

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