About: MIPS architecture

Facets (new session)
Description
Metadata
Settings
- Rule:
- Inverse Functional Properties:
- "Same As":

About: MIPS architecture Goto Sponge NotDistinct Permalink

An Entity of Type : dbo:InformationAppliance, within Data Space : el.dbpedia.org associated with source document(s)

MIPS (Microprocessor without Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA) developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. Computer architecture courses in universities and technical schools often study the MIPS architecture. The architecture greatly influenced later RISC architectures such as Alpha. In March 2021, MIPS announced that the development of the MIPS architecture had ended as the company is making the transition to RISC-V.

Attributes	Values
rdf:type	Thing information appliance
rdfs:label	MIPS architecture (en)
rdfs:comment	MIPS (Microprocessor without Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA) developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. Computer architecture courses in universities and technical schools often study the MIPS architecture. The architecture greatly influenced later RISC architectures such as Alpha. In March 2021, MIPS announced that the development of the MIPS architecture had ended as the company is making the transition to RISC-V. (en)
rdfs:seeAlso	MIPS Technologies
dbp:wikiPageUsesTemplate	dbt:Anchor dbt:Authority_control dbt:CPU_technologies dbt:Citation_needed dbt:Cite_book dbt:Commons_category dbt:Expand_section dbt:N/A dbt:No dbt:Reflist dbt:Rp dbt:See_also dbt:Short_description dbt:Start_date_and_age dbt:Update dbt:Use_mdy_dates dbt:Webarchive dbt:Wikibooks dbt:Yes dbt:Infobox_CPU_architecture dbt:RISC-based_processor_architectures dbt:MIPS_microprocessors
Subject	Advanced RISC Computing Computer-related introductions in 1985 Instruction set architectures MIPS Technologies MIPS architecture
prov:wasDerivedFrom	http://en.wikipedia.org/wiki/MIPS_architecture?oldid=1073828231&ns=0
Wikipage page ID	20170 (xsd:integer)
page length (characters) of wiki page	66922 (xsd:nonNegativeInteger)
Wikipage revision ID	1073828231 (xsd:integer)
Link from a Wikipage to another Wikipage	Floating-point arithmetic Floating-point unit Load–store architecture NEC NXP Semiconductors OVPsim Prpl Foundation Router (computing) Smart card Supercomputer TOP500 Video game console Workstation X32 ABI 64-bit computing Addressing mode Advanced Computing Environment Advanced RISC Computing Application binary interface Backward compatibility Bipolar Integrated Technology Bitwise operation Morgan Kaufmann Publishers Broadcom Corporation Cache control instruction Cache prefetching Call stack Advanced RISC Computing Computer-related introductions in 1985 Cavium Gemalto Glossary of computer hardware terms Instruction set architectures MIPS Technologies MIPS architecture Digital Equipment Corporation Digital signal processing PIC microcontrollers Pyramid Technology QEMU Quality of service Quantum Effect Devices Server (computing) DEC Alpha DLX Delay slot Tux List of MIPS architecture processors Philips Pipeline (computing) PlayStation (console) PlayStation 2 PlayStation Portable PlayStation technical specifications Predication (computer architecture) Cyber-shot Compressed instruction set Computer architecture Computer memory Coprocessor Microchip Technology Return statement SPIM Daniel W. Dobberpuhl

Faceted Search & Find service v1.17_git151 as of Feb 20 2025

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 07.20.3240 as of Nov 11 2024, on Linux (x86_64-ubuntu_focal-linux-gnu), Single-Server Edition (72 GB total memory, 1 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2025 OpenLink Software