About: Explicit data graph execution

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Explicit data graph execution, or EDGE, is a type of instruction set architecture (ISA) which intends to improve computing performance compared to common processors like the Intel x86 line. EDGE combines many individual instructions into a larger group known as a "hyperblock". Hyperblocks are designed to be able to easily run in parallel.

Attributes	Values
rdf:type	programming language
rdfs:label	Explicit data graph execution (en)
rdfs:comment	Explicit data graph execution, or EDGE, is a type of instruction set architecture (ISA) which intends to improve computing performance compared to common processors like the Intel x86 line. EDGE combines many individual instructions into a larger group known as a "hyperblock". Hyperblocks are designed to be able to easily run in parallel. (en)
sameAs	Explicit data graph execution Explicit data graph execution
dbp:wikiPageUsesTemplate	dbt:About dbt:CPU_technologies dbt:Citation_needed dbt:Frac dbt:Main dbt:More_citations_needed dbt:Original_research dbt:Reflist dbt:Snd
Subject	Instruction set architectures
gold:hypernym	Instruction
prov:wasDerivedFrom	http://en.wikipedia.org/wiki/Explicit_data_graph_execution?oldid=1068473983&ns=0
Wikipage page ID	10890306 (xsd:integer)
page length (characters) of wiki page	17593 (xsd:nonNegativeInteger)
Wikipage revision ID	1068473983 (xsd:integer)
Link from a Wikipage to another Wikipage	Floating-point unit Processor register Prograph Superscalar processor Very long instruction word X86 Arithmetic logic unit Basic block University of Texas at Austin University of Washington Bytecode C++ Carnegie Mellon University Instruction set architectures DARPA Source code Compiler Complex instruction set computer Computer data storage High-level programming language Microcode Motorola 68000 Data-flow analysis Dataflow programming IBM IBM 801 IBM System/360 Telephone exchange Instruction set architecture Subroutine Itanium Reduced instruction set computer Single instruction, multiple data
has abstract	Explicit data graph execution, or EDGE, is a type of instruction set architecture (ISA) which intends to improve computing performance compared to common processors like the Intel x86 line. EDGE combines many individual instructions into a larger group known as a "hyperblock". Hyperblocks are designed to be able to easily run in parallel. Parallelism of modern CPU designs generally starts to plateau at about eight internal units and from one to four "cores", EDGE designs intend to support hundreds of internal units and offer processing speeds hundreds of times greater than existing designs. Major development of the EDGE concept had been led by the University of Texas at Austin under DARPA's Polymorphous Computing Architectures program, with the stated goal of producing a single-chip CPU design with 1 TFLOPS performance by 2012, which has yet to be realized as of 2018. (en)
foaf:isPrimaryTopicOf	http://en.wikipedia.org/wiki/Explicit_data_graph_execution
is Wikipage redirect of	Explicit Data Graph Execution
is Link from a Wikipage to another Wikipage of	Edge Explicit Data Graph Execution
is foaf:primaryTopic of	http://en.wikipedia.org/wiki/Explicit_data_graph_execution

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