About: Embedded wafer level ball grid array     Goto   Sponge   NotDistinct   Permalink

An Entity of Type : owl:Thing, within Data Space : el.dbpedia.org associated with source document(s)

Embedded wafer level ball grid array (eWLB) is a packaging technology for integrated circuits. The package interconnects are applied on an artificial wafer made of silicon chips and a casting compound. eWLB is a further development of the classical wafer level ball grid array technology (WLB or WLP: wafer level package). The main driving force behind the eWLB technology was to allow fanout and more space for interconnect routing.

AttributesValues
rdfs:label
  • Embedded wafer level ball grid array (en)
rdfs:comment
  • Embedded wafer level ball grid array (eWLB) is a packaging technology for integrated circuits. The package interconnects are applied on an artificial wafer made of silicon chips and a casting compound. eWLB is a further development of the classical wafer level ball grid array technology (WLB or WLP: wafer level package). The main driving force behind the eWLB technology was to allow fanout and more space for interconnect routing. (en)
dbp:wikiPageUsesTemplate
Subject
thumbnail
foaf:depiction
  • http://commons.wikimedia.org/wiki/Special:FilePath/EWLB_Crossection_e.png
  • http://commons.wikimedia.org/wiki/Special:FilePath/EWLB_Sketch_e.png
prov:wasDerivedFrom
Wikipage page ID
page length (characters) of wiki page
Wikipage revision ID
Link from a Wikipage to another Wikipage
has abstract
  • Embedded wafer level ball grid array (eWLB) is a packaging technology for integrated circuits. The package interconnects are applied on an artificial wafer made of silicon chips and a casting compound. eWLB is a further development of the classical wafer level ball grid array technology (WLB or WLP: wafer level package). The main driving force behind the eWLB technology was to allow fanout and more space for interconnect routing. All process steps for the generation of the package are performed on the wafer. This allows, in comparison to classical packaging technologies (e. g. ball grid array), the generation of very small and flat packages with excellent electrical and thermal performance at lowest cost. It is common for all WLB technologies, which are built on a silicon wafer, that the interconnects (typically solder balls) fit on the chip (so called fan-in design). Therefore only chips with a restricted number of interconnects can be packaged. The eWLB technology allows the realization of chips with a high number of interconnects. The package is not created on a silicon wafer as for the classical wafer level package, but on an artificial wafer. Therefore a front-end-processed wafer is diced and the singulated chips are placed on a carrier. The distance between the chips can be chosen freely, but it is typically larger than on the silicon wafer. The gaps and the edges around the chips are now filled with a casting compound to form a wafer. After curing an artificial wafer containing a mold frame around the dies for carrying additional interconnect elements is created. After the build of the artificial wafer (the so-called reconstitution) the electrical connections from the chip pads to the interconnects are made in thin-film technology, as for any other classical wafer level package. With this technology any number of additional interconnects can be realized on the package in an arbitrary distance (fan-out design). Therefore, this wafer level packaging technology can also be used for space sensitive applications, where the chip area wouldn’t be sufficient to place the required number of interconnects at a suitable distance. The eWLB technology was developed by Infineon, STMicroelectronics and STATS ChipPAC Ltd. First components were brought into market mid of 2009 (mobile phone). (en)
foaf:isPrimaryTopicOf
is Wikipage redirect of
is Link from a Wikipage to another Wikipage of
is foaf:primaryTopic of
Faceted Search & Find service v1.17_git151 as of Feb 20 2025


Alternative Linked Data Documents: ODE     Content Formats:   [cxml] [csv]     RDF   [text] [turtle] [ld+json] [rdf+json] [rdf+xml]     ODATA   [atom+xml] [odata+json]     Microdata   [microdata+json] [html]    About   
This material is Open Knowledge   W3C Semantic Web Technology [RDF Data] Valid XHTML + RDFa
OpenLink Virtuoso version 07.20.3240 as of Nov 11 2024, on Linux (x86_64-ubuntu_focal-linux-gnu), Single-Server Edition (71 GB total memory, 969 MB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2025 OpenLink Software